Hi, I'm Dominic.
I'm a mechanical and electrical engineer (undergrad and grad respectively), with a background in aerospace and defense.
Most recently I've been working as an embedded systems engineer on FPGA HDL development for phased arrays for communications and radar.
I spend most of my time writing HDL and C for Xilinx SoCs, usually in embedded linux but sometimes in FreeRTOS.
I also spend a good bit of time in Python for tooling development.
This site was developed from scratch using Svelte and is hosted on Cloudflare Pages. It was originally developed in the Jekyll SSG, but was re-written for no good reason after I learned about Svelte in a personal project.
If you're interested the source is available on GitHub